1. Field of the Invention
The present invention relates to a semiconductor device having a transistor formed on a substrate where a semiconductor substrate, an insulating layer and a semiconductor layer are layered in this order, a driver circuit including this semiconductor device, and a manufacturing method of this semiconductor device.
2. Description of the Background Art
A conventional technology for forming a MOS transistor on an SOI (Silicon On Insulator) substrate where a semiconductor substrate, an insulating layer and a semiconductor layer are layered in this order, has been proposed for enhancing the performance of the device. Japanese Patent Application Laid-Open No. 11-87728 (1999), for example, discloses a technology for implementing, using an SOI substrate, a semiconductor device having a MOS transistor that is operable at high speed with a low voltage. In addition, Japanese Patent Application Laid-Open No. 2003-197919 discloses a technology for implementing, using an SOI substrate, a semiconductor device having a MOS transistor that is operable with a low voltage and with a small amount of leak current.
In conventional semiconductor devices where a p channel type MOS transistor is formed on an SOI substrate, the potential of the drain region of the MOS transistor that has been formed in the semiconductor layer of the SOI substrate and the potential of the rear face of the SOI substrate, that is, the potential of the semiconductor substrate of the SOI substrate, are in some cases set at the same potential, in order to stabilize the device properties. At this time, an electrical field is applied to the semiconductor layer of the SOI substrate via an insulating layer. Therefore, this semiconductor layer tends to easily deplete, due to the field plate effect. As a result, punch-through tends to easily occur between the source region and the drain region of the MOS transistor, and in some cases, the withstand voltage therebetween is lowered.
In addition, though a method for restricting extension of the depletion layer through the formation of the source region in the upper surface of an impurity region which has an impurity concentration higher than that of the semiconductor layer of the SOI substrate, and which is provided in the upper surface of this semiconductor layer is possible, this method makes the impurity concentration in the region where the channel layer of the MOS transistor is formed increase, and the threshold voltage of the MOS transistor increases.